I wish I was born in the 70s, working as a software or hardware engineer on former 8-bit/16-bit systems, right before technological progress pushes later devices to be unmanageable for one human being. As far as I can tell, I always dreamed of mastering a whole computer system, from low to high abstraction levels. Computers are fascinating objects to me.

Back in 2018, I started writing a basic 8-bit softcore CPU in VHDL, targeting a Nexys 3 development board, featuring a Spartan-6 Xilinx FPGA. The architecture was a very limited CISC architecture designed around an accumulator register, similar to a 6502 in that regard. I wrote a rudimentary assembler in Python, feeding it an assembly file to output a binary ready to be written into the CPU instruction ROM using BRAM onto the FPGA itself. This toy project helped me to get the intuition on how data can be managed through different data paths to perform computation or flow control in a processor.

In the same vein, I developed a very basic hardware 80x60 VGA text-mode video module that was driven by a Microblaze softcore, available here on GitHub. I remember showcasing it in school with a very basic shell application that could execute commands written from a PS/2 keyboard. This one brought my understanding of basic input/output interfaces to the next level.

Archive photo of an LCD monitor displaying the VGA signal generated from the text-mode video generator, featuring the complete set of characters contained in the character ROM, preceded to a header with text

Three years later, in 2021, I graduated from a French engineering school. I learned about different types of computer architectures, their limitations, and how the industry and academics went beyond many obstacles on the road to technical progress using pipelines, hierarchical caches, and many more strategies. During that period, despite not progressing on any personal project, I proposed to my peers to develop an NES emulator for a C student project. We succeeded in implementing it, mechgah was born.

Screenshot of mechgah, running Super Mario Bros

Once graduated, I joined the streaming industry as a software engineer, filled with high expectations on how software should be conceived and managed. Software engineering seemed a satisfying field as I had a special interest in test-driven development, testing, and other code quality concerns.

Despite my young age, I ended up being the software architect of a small team of four persons, nine months after being recruited as a junior software engineer. From an external point of view, I was rising on the social and technical ladder. However, analysis paralysis was a close friend, keeping me from working smoothly on attributed tasks. How could I design a great piece of software if incoming requests from clients — or product owners — were so vague and often incoherent with the product history? The rigidity and the conservatism I was demonstrating were not appropriate in the system I was working in. At the same time, I was not able to work on my project as the paralysis was following me at home, propagating to my core functioning. Personal projects are core to my identity, but they require cognitive energy that I ran off from. As a result, I got 24/7 anxious and burned out after only one year of employment. All of a sudden, I ran away from the company, to the surprise of my colleagues who thought I was thriving. The following years can be summarized as navigating between months of non-working time and other employment that filled me with anxiety. During this time, I felt depleted from any intellectual capabilities. I was not able to make sense of my interest in retro computers, also searching for a means to capitalize on something.

Seven months after the previous events, I was hired back from the company I got burned out in the first place as a part-time research engineer. This time, I was kept safe from the volatility of the industry. I could focus on my research subject for months without being preempted constantly. My research subject involved working with the Linux TCP/IP stack, which I became highly interested in.

Working four days a week left me a greater amount of time to recover and to progressively reintroduce my interest back into my life. I read and watched every content I could find on UNIX and retro or new computers. I was highly inspired by David Murray’s Dream Home Computer project, Ben Eater’s 8-bit breadboard computer projects, and Stefani Allaire’s works on the FNX retro new computer platforms. I knew I wanted to work on a project that involved building a personal computer from the ground up.

But Suuuu-un, why would you do that? There is no value in this, you know that right? What is the market?

To all of these questions, I’ve got one answer: I don’t care. It took me years to overcome these questions and be able to separate my interests from the capitalistic injunction that we are all subject to.

Now that I was aligned with my core values, freed from any guilt, I started thinking about how my dream computer would look like. First things first, I was not tied to a specific platform or CPU. Second, I am a pure control freak. I need a full understanding and control over the system. My dream computer could not be based on an off-the-shelf processor. Instead, my dream computer will be based on a processor tailored to the software that I will run on it. I want to be able to control the amount of cache sizes and their hierarchy as I want, or a least be able to tweak it later. Adding coprocessors or new instructions as they are necessary would be awesome. You probably guessed it, my dream computer would be centered around an FPGA.

For the CPU, I could design the Instruction Set Architecture (ISA) from scratch, but as I have been through this step in a previous processor design, I thought it would be more interesting to go through with the RISC-V royalty-free ISA. Why? The ISA is standardized through ratified documents, and every design choice is backed by years of academic study on RISC architectures. In addition, using an existing ISA relieves me from writing a compiler, I could just use the RISC-V GCC toolchain with platform-specific linker scripts. For the sake of simplicity, mine will be based on the RV32I instruction set to begin with.

The project seems appealing and looks like a therapy to me. I would be working on a platform I made up from scratch, supplementing it at wish for the sake of fun and stimulation. In the future, I would like to have a case that incorporates both a motherboard, featuring a FPGA, and a mechanical keyboard. Before that, let’s start implementing a basic RV32I softcore!

Implementation of a basic RV32I softcore

I already have a pipelined implementation of the RV32I softcore, to which I added an L1 instruction cache of 2kiB, reading instructions from a PCM flash on the Digilent Nexys 3 development board.

Reflexion board on how pipeline are affected in case of taken branch. Illustration and schematic as a way to move forward on the complex part of the project

Yet miss support for system calls and fence both I/O memory and instructions, the next step is to implement the Csr extension and explore the privileged standard to introduce IRQ to the system.


Keeping a personal project with a long-term goal keeps me from being completely paralyzed and feeling deeply empty. One should be able to keep and go on with a special interest, and the industry should accommodate appropriate neurodivergent people and their motives. Having a superpower does not mean anything if the superheroes goes offline for years by lack of accommodations.